Hi there, I’m attempting to run the following circuit as part of a VQA, I can draw the circuit, and it gives me what I’m looking for, but I keep getting a Wire error when I attempt to run it. For context, this should implement Circuit 19 of https://arxiv.org/pdf/1905.10876.pdf on p8. code: dev = …

Hi @JosephT :slight_smile: You encountered a known quirk of PennyLane that we are trying to find a better workaround for. The package assumes all arguments are trainable by default, and so wraps any non-array input in an array. This causes a problem with labelling wires, because 11 and np.array(…

Hi @christina , Thanks for the explanation! That didn’t seem to work for me because the function call is then using undefined variables to give values. My workaround is just using: n = int(n) which redefines it within the function.

Wire Error on IBM simulator

PennyLane Plugins

christina August 13, 2021, 9:12am 4

Glad it works for you now. We will keep your feedback in mind for future design and setting priorities on what to fix.

Topic		Replies	Views
WireError: No mapping for wire label 0 specified in wire map OrderedDict([(tensor(18, requires_grad=True), 0)]). The above exception was the direct cause of the following exception: PennyLane Help	2	459	June 30, 2022
An unknown error occurs when the qiskit plugin draws the circuit diagram PennyLane Help	5	861	June 30, 2022
Qiskit Hardware Backend Cannot Use Pennylane Wires? PennyLane Qiskit	7	1044	October 1, 2020
Error in construction QNode PennyLane Help	7	467	November 8, 2023
WireError When Building Circuit w/ QAOA Layer PennyLane Help	1	41	August 4, 2025

Wire Error on IBM simulator

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